Untitled Document
 
Untitled Document
 
ºñ¹Ð¹øÈ£ È®ÀÎ ´Ý±â
 
IC > ·ÎÁ÷ IC > 74F½Ã¸®Áî(SMD) > 74F574D (SO20)
ÃÖ¼ÒÁÖ¹®¼ö·® : 30°³
74F574D (SO20)
ÃÖ¼ÒÁÖ¹®¼ö·® : 30°³
Á¦Á¶È¸»ç : ANY
ÆǸŰ¡°Ý : 990¿ø
Àû¸³±Ý¾× : 0¿ø
¼ö·®  : °³
¡Ú¡Ú¡Ú¡Ú¡Ú
½Å¼ÓÇÏ°í Á¤È®ÇÑ ¹è¼ÛÀ» ¾à¼Óµå¸³´Ï´Ù
  
 

• Eight D-Type Flip-Flops in a Single
Package
• 3-State Bus-Driving True Outputs
• Full Parallel Access for Loading
• Buffered Control Inputs
• Package Options Include Plastic
Small-Outline Packages and Standard
Plastic 300-mil DIPs

description
This 8-bit flip-flop features 3-state outputs
designed specifically for driving highly capacitive
or relatively low-impedance loads. It is particularly
suitable for implementing buffer registers, I/O
ports, bidirectional bus drivers, and working
registers.
The eight flip-flops of the SN74F574 are edge-triggered D-type flip-flops. On the positive transition of the clock
(CLK) input, the Q outputs will be set to the logic levels that were set up at the data (D) inputs.
A buffered output enable (OE) input can be used to place the eight outputs in either a normal logic state (high
or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive
the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus
lines without need for interface or pullup components.
The output enable (OE) does not affect the internal operations of the flip-flops. Old data can be retained or new
data can be entered while the outputs are in the high-impedance state.
The SN74F574 is characterized for operation from 0¡ÆC to 70¡ÆC.


µ¥ÀÌÅͽÃÆ® º¸±â


* º» Á¦Ç°Àº °æ¿ì¿¡ µû¶ó ȣȯµÇ´Â Å¸»ç Á¦Ç°À¸·Î º¯°æµÉ ¼ö ÀÖÀ½À» ¾Ë·Á µå¸³´Ï´Ù.

  ÁÖ¹®½Ã Âü°í Çϼ¼¿ä~~

* Á¦Ç° »ç¿ë Àü ¹Ýµå½Ã Å×½ºÆ® ÈÄ »ç¿ëÇϽñ⠹ٶø´Ï´Ù.
* Ã·ºÎµÈ µ¥ÀÌÅͽÃÆ®´Â Âü°í¿ëÀ¸·Î¸¸ »ç¿ëÇϽñ⠹ٶø´Ï´Ù.

   
À̸§ :
³»¿ë :
ÆòÁ¡
 
 
 
 
¹øÈ£ Á¦¸ñ ÀÛ¼ºÀÚ ÀÛ¼ºÀÏ Á¶È¸
 
 

Untitled Document