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74F393D (SO14)
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Dual 4-bit binary ripple counter 74F393

FEATURES
• Two 4-bit binary counters
• Two Master Resets to clear each 4-bit counter individually

DESCRIPTION
The 74F393 is a Dual Ripple Counter with separate Clock (CPn) and
Master Reset (MR) inputs to each counter. The two counters are
identified by the ¡°a¡± and ¡°b¡± suffixes in the pin configuration. The
operation of each half of the 74F393 is the same. The counters are
triggered by a High-to-Low transition of the Clock (CPa and CPb)
inputs. The counter outputs are internally connected to provide
Clock inputs to succeeding stages. The outputs of the ripple counter
do not change synchronously and should not be used for high speed
address decoding. The Master Resets (MRa and MRb) are active
High asynchronous inputs; one for each 4-bit counter. A High level
in the MR input overrides the Clock and sets the outputs Low.


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