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IC > ·ÎÁ÷ IC > 74F½Ã¸®Áî(DIP) > 74F138 (DIP)
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74F138 (DIP)
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1-of-8 decoder/demultiplexer

FEATURE

• Demultiplexing capability
• Multiple input enable for easy expansion
• Ideal for memory chip select decoding
• Industrial temperature range available (–40¡ÆC to +85¡ÆC)

DESCRIPTION
The 74F138 decoder accepts three binary weighted inputs (A0, A1,
A2) and when enabled, provides eight mutually exclusive, active low
outputs (Q0 – Q7). The device features three enable inputs; two
active low (E0, E1) and one active high (E2). Every output will be
high unless E0 and E1 are low and E2 is high. This multiple enable
function allows easy parallel expansion of the device to 1-of-32
(5 lines to 32 lines) decoder with just four 74F138s and one inverter
(see Figure 1). The device can be used as an eight output
demultiplexer by using one of the active low enable inputs as the
data input and the remaining enable inputs as strobes. Enable
inputs not used must be permanently tied to their appropriate active
high or active low state.


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