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IC > ·ÎÁ÷ IC > 74LVC½Ã¸®Áî(SMD) > 74LVC574AD (SO20)
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74LVC574AD (SO20)
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Octal D-type flip-flop with 5-volt tolerant
inputs/outputs; positive edge-trigger (3-State)

FEATURES
• 5-volt tolerant inputs/outputs, for interfacing with 5-volt logic
• Supply voltage range of 2.7V to 3.6V
• Complies with JEDEC standard no. 8-1A
• Inputs accept voltages up to 5.5V
• CMOS low power consumption
• Direct interface with TTL levels
• High impedance when VCC = 0V
• 8-bit positive edge-triggered register
• Independent register and 3-State buffer operation
• Flow-through pin-out architecture

DESCRIPTION
The 74LVC574A is a high-performance, low-power, low-voltage,
Si-gate CMOS device, superior to most advanced CMOS
compatible TTL families.
Inputs can be driven from either 3.3V or 5V devices. In 3-State
operation, outputs can handle 5V. This feature allows the use of
these devices as translators in a mixed 3.3V/5V environment.
The 74LVC574A is an octal D-type flip-flop featuring separate
D-type inputs for each flip-flop and 3-State outputs for bus-oriented
applications. A clock (CP) and an output enable (OE) input are
common to all flip-flops.
The eight flip-flops will store the state of their individual D-inputs
that meet the setup and hold times requirements on the
LOW-to-HIGH CP transition.
When OE is LOW, the contents of the eight flip-flops is available at
the outputs. When OE is HIGH, the outputs go to the high
impedance OFF-state. Operation of the OE input does not affect the
state of the flip-flops.
The ¡¯574A¡¯ is functionally identical to the ¡¯374A¡¯, but the ¡¯374A¡¯ has a
different pin arrangement.


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