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IC > ·ÎÁ÷ IC > 74LV½Ã¸®Áî(SMD) > 74LV4052PW (TSSOP16)
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74LV4052PW (TSSOP16)
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Dual 4-channel analog multiplexer/demultiplexer 74LV4052

FEATURES
• Optimized for low voltage applications: 1.0 to 6.0 V
• Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
• Low typ ¡°ON¡± resistance:
60  at Vcc – VEE = 4.5 V
90  at Vcc – VEE = 3.0 V
145  at Vcc – VEE = 2.0 V
• Logic level translation: to enable 3 V logic to communicate with ¡¾ 3
V analog signals
• Typical ¡°break before make¡± built in
• Analog/Digital multiplexing and demultiplexing
• Signal gating
• Output capability: non-standard
• ICC category: MSI

DESCRIPTION
The 74LV4052 is a low-voltage CMOS device and is pin and
function compatible with the 74HC/HCT4052.
The 74LV4052 is a dual 4-channel analog multiplexer/demultiplexer
with a common select logic. Each multiplexer has four independent
inputs/outputs (nY0 to nY3) and a common input/output (nZ). The
common channel select logics include two digital select inputs (S0
and S1) and an active LOW enable input (E).
With E LOW, one of the four switches is selected (low impedance
ON-state) by S0 and S1. With E HIGH, all switches are in the high
impedance OFF-state, independent of S0 and S1. VCC and GND are
the supply voltage pins for the digital control inputs (S0, S1 and E).
The VCC to GND ranges are 1.0 to 6.0 V. The analog inputs/outputs
(nY0, to nY3, and nZ) can swing between VCC as a positive limit and
VEE as a negative limit. VCC - VEE may not exceed 6.0 V. For
operation as a digital multiplexer/demultiplexer, VEE is connected to
GND (typically ground).


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