|
74LV393D (SO14) ÃÖ¼ÒÁÖ¹®¼ö·® : 20°³ |
|
|
Á¦Á¶È¸»ç : NXP |
ÆǸŰ¡°Ý : 1,380¿ø |
|
|
|
Àû¸³±Ý¾× : 0¿ø |
|
|
|
|
|
¡Ú¡Ú¡Ú¡Ú¡Ú |
½Å¼ÓÇÏ°í Á¤È®ÇÑ ¹è¼ÛÀ» ¾à¼Óµå¸³´Ï´Ù |
|
|
|
|
|
Dual 4-bit binary ripple counter 74LV393
FEATURES • Optimized for Low Voltage applications: 1.0 to 3.6V • Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V • Typical VOLP (output ground bounce) 0.8V @ VCC = 3.3V, Tamb = 25¡ÆC • Typical VOHV (output VOH undershoot) 2V @ VCC = 3.3V, Tamb = 25¡ÆC • Two 4-bit binary counters with individual clocks • Divide-by any binary module up to 28 in one package • Two master resets to clear each 4-bit counter individually • Output capability: standard • ICC category: MSI
DESCRIPTION The 74LV393 is a low–voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT393. The 74LV393 is a dual 4-bit binary ripple counter with separate clocks (1CP, 2CP) and master reset (1MR, 2MR) inputs to each counter. The operation of each half of the ¡®¡®393¡¯¡¯ is the same as the ¡®¡®93¡¯¡¯ except no external clock connections are required. The counters are triggered by a HIGH-to-LOW transition of the clock inputs. The counter outputs are internally connected to provide clock inputs to succeeding stages. The outputs of the ripple counter do not change synchronously and should not be used for high-speed address decoding. The master resets are active-HIGH asynchronous inputs to each 4-bit counter identified by the ¡®¡®1¡¯¡¯ and ¡®¡®2¡¯¡¯ in the pin description. A HIGH level on the nMR input overrides the clock and sets the outputs LOW.
µ¥ÀÌÅͽÃÆ® º¸±â
* º» Á¦Ç°Àº °æ¿ì¿¡ µû¶ó ȣȯµÇ´Â Ÿ»ç Á¦Ç°À¸·Î º¯°æµÉ ¼ö ÀÖÀ½À» ¾Ë·Á µå¸³´Ï´Ù.
ÁÖ¹®½Ã Âü°í Çϼ¼¿ä~~ |
* Á¦Ç° »ç¿ë Àü ¹Ýµå½Ã Å×½ºÆ® ÈÄ »ç¿ëÇϽñ⠹ٶø´Ï´Ù.
* ÷ºÎµÈ µ¥ÀÌÅͽÃÆ®´Â Âü°í¿ëÀ¸·Î¸¸ »ç¿ëÇϽñ⠹ٶø´Ï´Ù. |
|
|
¹øÈ£ |
|
Á¦¸ñ |
ÀÛ¼ºÀÚ |
ÀÛ¼ºÀÏ |
Á¶È¸ |
|
|
|
|