|
HEF4526BT (SO16)
최소주문수량 : 20개 |
|
|
| 제조회사 : ANY |
| 판매가격 : 1,290원 |
|
|
|
| 적립금액 : 0원 |
|
|
|
|
|
| ★★★★★ |
| 신속하고 정확한 배송을 약속드립니다 |
|
|
|
|
|
Programmable 4-bit binary down counter
DESCRIPTION
The HEF4526B is a synchronous programmable 4-bit
binary down counter with an active HIGH and an active
LOW clock input (CP0, CP1), an asynchronous parallel
load input (PL), four parallel inputs (P0 to P3), a cascade
feedback input (CF), four buffered parallel outputs (O0 to
O3), a terminal count output (TC) and an overriding
asynchronous master reset input (MR).
This device is a programmable, cascadable down counter
with a decoded TC output for divide-by-n applications. In
single stage applications the TC output is connected to PL.
CF allows cascade divide-by-n operation with no
additional gates required.
Information on P0 to P3 is loaded into the counter while PL
is HIGH, independent of all other input conditions except
MR, which must be LOW. When PL and CP1 are LOW, the
counter advances on a LOW to HIGH transition of CP0.
When PL is LOW and CP0 is HIGH, the counter advances
on a HIGH to LOW transition of CP1. TC is HIGH when the
counter is in the zero state (O0 = O1 = O2 = O3 = LOW)
and CF is HIGH and PL is LOW. A HIGH on MR resets the
counter (O0 to O3 = LOW) independent of other input
conditions.
Schmitt-trigger action in the clock input makes the circuit
highly tolerant to slower clock rise and fall times.
데이터시트 보기
* 본 제품은 경우에 따라 호환되는 타사 제품으로 변경될 수 있음을 알려 드립니다.
주문시 참고 하세요~~
|
* 제품 사용 전 반드시 테스트 후 사용하시기 바랍니다.
* 첨부된 데이터시트는 참고용으로만 사용하시기 바랍니다. |
 |
|
