3-STATE Octal D-Type Transparent Latches
and Edge-Triggered Flip-Flops
General Description
These 8-bit registers feature totem-pole 3-STATE outputs
designed specifically for driving highly-capacitive or relatively
low-impedance loads. The high-impedance state and
increased high-logic level drive provide these registers with
the capability of being connected directly to and driving the
bus lines in a bus-organized system without need for interface
or pull-up components. They are particularly attractive
for implementing buffer registers, I/O ports, bidirectional
bus drivers, and working registers.
The eight latches of the DM74LS373 are transparent Dtype
latches meaning that while the enable (G) is HIGH the
Q outputs will follow the data (D) inputs. When the enable
is taken LOW the output will be latched at the level of the
data that was set up.
The eight flip-flops of the DM74LS374 are edge-triggered
D-type flip flops. On the positive transition of the clock, the
Q outputs will be set to the logic states that were set up at
the D inputs.
A buffered output control input can be used to place the
eight outputs in either a normal logic state (HIGH or LOW
logic levels) or a high-impedance state. In the high-impedance
state the outputs neither load nor drive the bus lines
significantly.
The output control does not affect the internal operation of
the latches or flip-flops. That is, the old data can be
retained or new data can be entered even while the outputs
are OFF.
Features
Choice of 8 latches or 8 D-type flip-flops in a single package
3-STATE bus-driving outputs
Full parallel-access for loading
Buffered control inputs
P-N-P inputs reduce D-C loading on data lines
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