4-STAGE PRESETTABLE
RIPPLE COUNTERS
The SN54/74LS196 decade counter is partitioned into divide-by-two and divide-
by-five sections which can be combined to count either in BCD (8, 4, 2, 1)
sequence or in a bi-quinary mode producing a 50% duty cycle output. The
SN54/74LS197 contains divide-by-two and divide-by-eight sections which
can be combined to form a modulo-16 binary counter. Low Power Schottky
technology is used to achieve typical count rates of 70 MHz and power dissipation
of only 80 mW.
Both circuit types have a Master Reset (MR) input which overrides all other
inputs and asynchronously forces all outputs LOW. A Parallel Load input (PL)
overrides clocked operations and asynchronously loads the data on the Parallel
Data inputs (Pn) into the flip-flops. This preset feature makes the circuits
usable as programmable counters. The circuits can also be used as 4-bit
latches, loading data from the Parallel Data inputs when PL is LOW and storing
the data when PL is HIGH.
• Low Power Consumption — Typically 80 mW
• High Counting Rates — Typically 70 MHz
• Choice of Counting Modes — BCD, Bi-Quinary, Binary
• Asynchronous Presettable
• Asynchronous Master Reset
• Easy Multistage Cascading
• Input Clamp Diodes Limit High Speed Termination Effects
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