3-STATE Quad 2-Data Selectors/Multiplexers
General Description
These Schottky-clamped high-performance multiplexers
feature 3-STATE outputs that can interface directly with
data lines of bus-organized systems. With all but one of the
common outputs disabled (at a high impedance state), the
low impedance of the single enabled output will drive the
bus line to a HIGH or LOW logic level. To minimize the possibility
that two outputs will attempt to take a common bus
to opposite logic levels, the output enable circuitry is
designed such that the output disable times are shorter
than the output enable times.
This 3-STATE output feature means that n-bit (paralleled)
data selectors with up to 258 sources can be implemented
for data buses. It also permits the use of standard TTL registers
for data retention throughout the system.
Features
3-STATE versions LS157 and LS158 with same pinouts
Schottky-clamped for significant improvement in A-C
performance
Provides bus interface from multiple sources in
high-performance systems
Average propagation delay from data input 12 ns
Typical power dissipation: 50 mW
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