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PALCE22V10H-10JC/5 ÃÖ¼ÒÁÖ¹®¼ö·® : 10°³ |
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Á¦Á¶È¸»ç : Lattice |
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DISTINCTIVE CHARACTERISTICS As fast as 5-ns propagation delay and 142.8 MHz f MAX (external)
Low-power EE CMOS
10 macrocells programmable as registered or combinatorial, and active high or active low to match application needs
Varied product term distribution allows up to 16 product terms per output for complex functions
Peripheral Component Interconnect (PCI) compliant (-5/-7/-10)
Global asynchronous reset and synchronous preset for initialization
Power-up reset for initialization and register preload for testability
Extensive third-party software and programmer support
24-pin SKINNY DIP, 24-pin SOIC, and 28-pin PLCC
5-ns and 7.5-ns versions utilize split leadframes for improved performance
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